It's a bit inconsistent that most ISAs out there have division that rounds towards zero but only right shift that rounds down.

PowerPC is the only production-ISA I've found that has an arithmetic right-shift instruction designed for rounding towards zero. It sets the Carry flag if a 1 is shifted out and the result is negative. Then only an "add with carry" instruction is needed to adjust the result.

From what I can tell, it literally is a holdover from the FORTRAN days when IBM machines used a sign-magnitude integers, so truncating division was an obvious choice for hardware dividers; and then nobody dared to change the semantics of neither the hardware nor the programming languages for some reason, and it carried all the way forwards to nowadays.

I am fairly certain that restoring/non-restoring unsigned binary division algorithms can be made to do signed division that would round down with minimal change that is not "divide the absolute values and then fix the signs", and for algorithms used in high-speed division hardware the choice of rounding doesn't really matter.