I have no idea about S0 but CS is usually chip select. It should be sufficient to short it to prevent the chip from being selected. However CS is frequently inverted and you would have to pull it up to prevent the chip selection, so maybe S0 is always high and inhibit CS

SO (MISO) should generally be high impedance if not selected...

I suspect this causes SO to always output the same value and the Ethernet controller must expect some magic

That makes sense, thank you.