| ▲ | fodkodrasz 21 hours ago | |
> triple level cell-based 4D memory What does 4D memory mean? | ||
| ▲ | wrs 21 hours ago | parent | next [-] | |
It’s marketing speak. 3D flash (stacked chips) with the control circuits stacked underneath instead of to the side. So it’s one louder. https://www.tomshardware.com/news/sk_hynix-debuts-4d_nand,37... | ||
| ▲ | matja 21 hours ago | parent | prev | next [-] | |
Nothing - just marketing. It's their 2nd gen Periphery Under Cell (PUC) device. | ||
| ▲ | tbrownaw 17 hours ago | parent | prev | next [-] | |
It'd have to be something involving time... maybe have each cell be a delay line? Or a resonant cavity, and store multiple bits at different modes? Not sure how either could be made small enough to be worth it though... | ||
| ▲ | K0HAX 20 hours ago | parent | prev | next [-] | |
Bigger number = more betterer | ||
| ▲ | baybal2 21 hours ago | parent | prev [-] | |
[dead] | ||