Great article!

> Note that when the chip is completed, every transistor gate is connected to another transistor's source or drain (which provides the signal to the gate)

That's a very curious assertion, which made me think a bit more (it feels incorrect at first but on a second thought it looks correct)

I would think of "pure input pins" but I suppose those have pull-up or pull-down "resistors" which in silicon are actually diodes? gateless fets?

Input pin pad structure usually contains two reverse biased diodes for ESD protection which should remove the antenna issue.

Yes, input pins are kind of an exception; the source or drain providing the voltage is external.