The difficult part is the place and route algorithm, not the bitstream. The proprietary ones already take quite a long time to solve: I regularly have 12-24h runs. Perhaps an open source one could do better? But it's not quite as straightforward as reverse engineering a proprietary bitstream.

▲

javawizard 4 hours ago | parent | next [-]

That's why nextpnr exists :)

https://github.com/YosysHQ/nextpnr

As someone actively working on nextpnr support for a fairly new FPGA architecture, it really is amazing that we have something like that in the open source world.

YosysHQ are one of my favorite companies to exist.

	▲	epsilon537 36 minutes ago \| parent [-]
		Nextpnr and Project X-Ray are amazing projects. Reverse engineering the physical map of, say, a 7-series FPGA is no small feat. However, I wonder if they'll ever be able to really compete with Vivado without getting access to the characterization models for timing. I would love to switch over, but the Fmax of my project routed with nextpnr is less than half of what I get with Vivado.

▲

Taniwha 4 hours ago | parent | prev | next [-]

When I first started doing chip design my boss paid more for tools per year than he paid me ... now days open source tool chains are leaping ahead ... I don't need a boss (or VCs) in order to design chips

▲

FarmerPotato 2 hours ago | parent | prev [-]

Somewhere in reverse-engineering-land is the desire to figure out undocumented hardware blocks. I’m not disagreeing about PNR here.